The present invention relates to digital memory architectures, and more particular to a picture transformation memory for use with a digital video effects system.
A digital video effects system receives video data, either analog or digital, from various sources, such as cameras, video tapes and discs, etc., via an input section. The video data is converted to a desired digital format in the input section and appropriately filtered according to the effects which are desired at the output of the system. The filtered digital video data is then transformed, i.e., a transform section performs spatial transformations, such as enlargement, reduction, translation and rotation. The digital video data, representing a picture image, is written into a frame buffer in a normal, unchanged way using a first set of addresses generated by an input address generator. An output address generator, sometimes called a reverse or transformation address generator, reads the picture image out of the frame buffer in such a manner as to create the desired transform. An address limit detector senses when a given output address is outside the frame buffer's address range and blanks the video for those addresses. The addresses from the transformation address generator are derived from the original addresses of an output display screen, such as a television monitor, multiplied by a transform matrix T'. Besides the video frame buffer to store the luminance and chrominance components of the picture, a key frame buffer is also operated in parallel to provide shape and transparency information about the picture, the key being transformed in a like manner as the picture. The transformed picture from the frame buffer is mixed with a background picture image in proportion to the key value (between 0 and 1) to produce the final picture image which is displayed.
When transforming an interlaced video picture in a digital video effects system, it is desirable to perform the video processing on a full frame as if the picture image were not interlaced. Such a spatial transformation system is described in U.S. Pat. No. 4,463,372 entitled "Spatial Transformation System Including Key Signal Generator" issued to Phillip P. Bennett and Steven A. Gabriel on July 31, 1984. At FIG. 6 and column 19 of that patent a particular memory architecture is described which uses three full field buffer memories. The input to the three buffer memories is the digitized video picture image to be transformed or otherwise processed by the digital video effects system. The field buffers operate on a continuous revolving basis in that one buffer receives an incoming field of data while the other two buffers, containing the newest complete field of data and the prior complete field of data, provide outputs via a multiplexer which together make up a complete picture frame of data. Thus a field buffer memory on consecutive data fields first receives an input field of data, then outputs the newest complete field of data, and finally outputs the prior complete field of data, the cycle repeating itself every three fields.
Real time television frame stores require significant quantities of semiconductor memory. Since the picture elements (pixels) occur at approximately 70 nanosecond intervals, current practically available memory storage chips which are inexpensive and relatively low in power consumption cannot be accessed at pixel clock rates. To accommodate the required bandwidth the Bennett et al patent implements each field buffer memory as eight modules of 32K.times.8 memory which are addressed sequentially, i.e., once every eight pixel clock periods. This method, however, requires that the stored data be accessed in a specific order and is not a totally random access frame store.
As indicated there are three channels of data that are transformed in parallel: a luminance channel, a chrominance channel and an associated key channel. To facilitate manufacture and maintenance of the digital video effects system it is advantageous for the hardware in each channel to be interchangeable. However standard television formats provide a full bandwidth luminance component of video and two half bandwidth chrominance components of the video which requires different processing for the luminance and chrominance components. Further, when pictures are transformed, it is necessary to obtain pixels between actual pixels stored in the frame store to provide smooth movement and continuity of the picture. Therefore, interpolation is required, and such interpolation requires access not just to one pixel from the frame store, but to neighboring pixels as well. What is desired is a picture transformation memory which provides identical frame stores for both full bandwidth signals and half bandwidth signals to allow interchangeability of the various frame stores within a digital video effects system, which provides a fully random accessible output of an addressed pixel together with its neighbors to an interpolator, and which allows manipulation of a full frame of data at apparent real time pixel rates.